1. Field of the Invention
The present invention relates to an information processing apparatus, a control method for the same, and a computer program.
2. Description of the Related Art
In recent years, information processing apparatuses that process images or video have had a large size of data to be processed, and the amount of data handled in the information processing apparatuses has been increasing. This has caused increases in the processing time and the circuit size in the information processing apparatuses.
As such, attempts are made to solve the above problems by parallel processing. For example, a technique is known in which data to be processed is divided, parameters necessary for each kind of processing are added, and each piece of the data is processed as an independently processable processing unit based on the parameters (for example, see Japanese Patent Laid-Open No. 2002-328883).
An information processing apparatus according to this technique has a first processing block and a second processing block connected with each other via a data communication path. The first processing block generates a packet having a data portion that includes image data divided into rectangles and a header portion that includes processing parameters. The first processing block outputs subpackets created by further dividing the packet to the second processing block. The second processing block has a plurality of subblocks each performing different image processing, and executes the received subpackets in the subblocks. Thus, dividing image data of a large size into packets allows parallel processing and therefore a reduction in the processing time. However, if data needed for processing is present across a plurality of packets, it is necessary to temporarily store all the packets required for the processing. This poses a problem of an increase in the size of a packet storage unit.
In image processing in which a plurality of execution results are integrated and output at the last stage of parallel processing, a buffer is generally used to perform queuing. One technique used for this purpose is to have a storage area and a task starting unit, where the storage area holds execution results of processing at preceding stages, and the task starting unit starts processing at a next stage upon recognizing that complete data is present in the storage area (for example, see Japanese Patent Laid-Open No. 2004-220093). An apparatus according to this technique includes a task starting unit that determines whether or not each of a plurality of tasks can be started, an execution task determination unit that determines a task to be started based on the determination result of the task starting unit, and a processor core that executes the task determined by the execution task determination unit. The task starting unit has a plurality of FIFO storage units connected thereto, and determines whether or not a FIFO storage unit holds data to be input to a task and whether or not a free space is present in another FIFO storage unit in which a task execution result is to be stored. Based on the result of this determination, the execution task determination unit determines a task to be started. Thus, a task to be executed can be started depending on the data storage state of the FIFO storage units. Therefore, a plurality of tasks can be processed without overhead of scheduling by an operating system for the period from when it is ready to start the tasks to when the tasks are started. However, even in this method, if data needed for the processing spans a plurality of pieces of data, data received until the complete necessary data becomes available has to be held. This poses a problem of an increase in the size of a data storage unit.
As described above, in a parallel information processing apparatus in which processing data is divided and processed, if a data processing unit performs processing by referencing a plurality of pieces of data, the data processing unit cannot start the processing until all the reference data becomes available. Therefore, the data processing unit has to wait for all the necessary reference data to become available while holding all data received until all the necessary reference data becomes available. The timing at which all the necessary data becomes available widely varies with factors such as the timing of issuing the data, the degree of congestion in a communication path, the difference of the processing time in each data processing unit, and the like. This poses a problem of an increase in the size of a storage unit that should be included in the processing apparatus.
Such a problem can arise in image processing that involves composition from a plurality of images, for example. In the composition processing, the processing cannot be started until the same portions of a plurality of pieces of image data for composition become available. Therefore, it is necessary to have a buffer of a size capable of holding all image data received until the image data of the same portions become available. Besides the composition processing, a similar problem also arises in progressive conversion (IP conversion) in which temporally different frames of the same video are referenced to perform processing.